GATE | CS | 2014 | Set 3 | Digital Logic | Sequential Circuit | Question 38

Last Updated :
Discuss
Comments
 

The above sequential circuit is built using JK flip-flops is initialized with Q2Q1Q0 = 000. The state sequence for this circuit for the next 3 clock cycle is

001, 010, 011

111, 110, 101

100, 110, 111

100, 011, 001

Share your thoughts in the comments