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Multiplexers in Digital Logic
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Sequential Binary Multiplier

Last Updated : 11 Sep, 2024
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In this article, we are going to learn how a sequential binary multiplier works with examples. So for that, we also need to learn a few concepts related to the sequential circuit, binary multipliers, etc. Finally solving the examples using a sequential binary multiplier method.

Sequential Circuit

A sequential circuit is a combinational circuit with memory. The output of the sequential circuit depends on present inputs and present state [past outputs]. The information stored in the sequential circuit represents the present state. The present state and present input will define the output of the next state.  

Binary Multiplier

A binary multiplier is used to multiply two binary numbers. It is a basic electronic circuit in digital electronics, such as a computer. The binary multiplier is also called an add-shift adder. 

A digital multiplier can be implemented using a variety of computer arithmetic techniques. The majority of techniques involve computing a set of partial products, which are then summed using binary adders.

Adder: An adder, also known as summer, is a digital circuit that performs number addition. Adders are used in the arithmetic logic units of many computers and other types of processors (ALUs).

Types of Multipliers

  1. Bit Multiplier 2x2: This multiplier can multiply two numbers with bit size = 2, which means that both the multiplier and the multiplicand can be of 2 bits.
  2. Bit Multiplier 3x3: This multiplier has a maximum bit size of 3 bits and can multiply two numbers. The product's bit size will be 6. 
  3. Bit Multiplier 4x4: This multiplier can multiply a 4-bit binary number and produce an 8-bit product because the bit size of the product equals the sum of the bit sizes of the multiplier and multiplicand.

Before going to sequential binary multiplication first let's see how normal binary multiplication works: 

Binary Multiplication 

Consider two binary numbers num1 and num2

num1=12 ⇢ which equivalent to binary value as 1100 ⇢ multiplier num2=13 ⇢ which equivalent to binary value as 1101 ⇢ multiplicand

Example 1:

                  1 1 0 0                 x 1 1 0 1  ----------------------                   1 1 0 0             0 0 0 0       1 1 0 0 1 1 0 0 --------------------       1 0 0 1 1 1 0 0

The above multiplication is performed by a sequential binary multiplier as below:

Operation:

Consider two binary numbers num1 and num2

Step 1: 

num1=12 ⇢ which equivalent to a binary value as 1100   num2=13 ⇢ which equivalent to binary value as 1101 

Assume multiplier as M and multiplicand as Q

Step 2: 

Here we also need the other two parameters accumulator and carry and  initially the values of both accumulator and carry will be zero. Let, Accumulator a = 0000 Carry c = 0  

Step 3: 

Q = 1  1  0  1     q3 q2 q1 q0 

if q0=0 then perform an only right shift operation 

if q0=1 then perform add (A+M) and  right shift operation 

Here we have to perform up to 4 steps because the number of bits in the multiplier is 4

StepsM (Multiplier)C (Carry)A(Accumulator)Q (Multiplicand)Operation
 110000000

1  1  0  1

q3q2q1q0

initialization

q0=1 then perform the next step as add and shift right operation

Step 111000

0000+

1100

------

1100

0110

1101

0  1  1  0

q3q2q1q0

A+M 

right shift operation of carry, accumulator, and quotient and discard 

last value i.e. q0 after shifting

q0=0 perform next step only right shift operation

Step 211000

0110

0011

0110

0011

right shift operation 

q0=1 perform next step add (A+M) and shift right operation 

Step 3 11000

0011

1100

-------

1111

0111

0011

1001

A+M

right shift operation of carry, accumulator, and quotient and discard

last value i.e. q0 after shifting

q0=1 perform add (A+M) and shift right operation

Step 41100

1

----

0111

1100

-------

0011

------

1001

1001

--------

1100

A+M

right shift operation of carry, accumulator, and quotient and discard

last value i.e. q0 after shifting 

Here is the final result of multiplication because we have to perform 

only 4 steps as number bits is 4 in multiplier

Step 4: 

Result = Combination of accumulator value(A) and Q =>10011100  the equivalent value is 156 obtained from the formula  .........+23+22+21+20  1   0   0   1    1   1    0   0 27+0+0+24+23+22+0+0 =156

Flow chart

The flow chart explains the whole operation of the sequential binary multiplier in a simple manner. First, assign 0 to the accumulator and carry values. then check the LSB of Q i.e., Q0, if q0 is 0 then perform only the right shift operation and if q0 is 1 then perform the addition of the accumulator and multiplicand, store the result in the accumulator then perform the right shift operation. We have to continue this process based on the number of bits in the multiplier. 

Flow chart of sequential binary multiplier
Flow chart of sequential binary multiplier

Hardware Circuit Diagram

The below diagram describes the hardware circuit of the sequential binary multiplier. 

Hardware circuit diagram
Hardware circuit diagram

Example 2: Here we have to perform up to 4 steps because the number of bits in the multiplier is 4.

StepsM (Multiplier)C (Carry)A(Accumulator)Q (Multiplicand)Operation
 011000000

1  1  1  0

q3q2q1q0

initialization

q0=0 perform next step only right shift operation

Step1 000000111q0=1 then perform the next step as add and shift right operation
Step20110

0

0

0000+

0110

-------

0110

0011

0111

0011

A+M

right shift operation of, accumulator and quotient and discard

last value i.e. q0 after shifting

q0=1 then perform the next step as add and shift right operation

Step30110

0

0

0011

0110

------

1001

0100

0011

1001

A+M

right shift operation of carry, accumulator, and quotient and discard

last value i.e. q0 after shifting

q0=1 then perform the next step as add and shift right operation

Step40110

0

0

0100

0110

------

1010

0101

1001 

0100

A+M

right shift operation of carry, accumulator, and quotient and discard

last value i.e. q0 after shifting

Here is the final result of multiplication because we have to perform

only 4 steps as number bits are 4 in multiplier

Result: 

Combination of accumulator value(A) and Q =>01010100  the equivalent value is 84 obtained from the formula .........+23+22+21+20   0   1    0   1    0   1   0  0  0+64+0+16+0+8+0+0 ⇢ 84

Right Shift Operation

Another procedure involved in binary multiplication when using a sequential binary multiplier is the right shift procedure; it is useful in the correct alignment of the binary numbers to allow subsequent operations. Here’s how the right shift operation is carried out and what it means in this context:

Concept of Right Shift

  • Logical Shift: This entails moving all the bits to the right most side of the bar and placing a value of ‘0’ on the extreme left side of the bar. This is normally employed where an unsigned number is being worked on.
  • Arithmetic Shift: This involves a shifting of all bits to the right while the sign of the bit which is usually the left most in a signed number remains intact. For unsigned numbers this is essentially the same as a logical shift.

Since, we are dealing with unsigned binary numbers in the case of sequential binary multipliers, we generally perform a logical shift.

How it works in Sequential Multiplication

Initial Setup: In multiplication you have two major components involved.

  • Accumulator (A): Contains the intermediate sum outputs or the afterthoughts.
  • Multiplier (Q): This one is actually holding the shifting format of the multiplicand in a binary format.

Right Shift Operation

Shift Right All Bits

  • Every bit of the Accumulator (A) and the Multiplier (Q) is shifted one position in the right.
  • The last bit of the Accumulator and the Multiplier is removed; the first bit of it is replaced by ‘0’.

Update Carry

  • The term carry out that was shifted from the Accumulator or Multiplier often forms the new carry. It is utilized in the subsequent addition function.

Effect on Binary Numbers

  • For the Multiplier (Q): In such a way, changing the place of the multiplier to the right contributes to preparation for the further work of the next LSB. When the LSB of the Q, that is, Q0 is 1, then the current value of the Accumulator is added to the partial product accumulation. Finally after increment the whole binary number is shifted right.
  • For the Accumulator (A): The Accumulator is shifted right with reference to its new position of the multiplier bits. This makes it ready for the next addition operation to take place.

Example

To explain it methodically, let’s go through the step by step example, of a 4-bit sequence binary multiplier.

Initial Values:

  • Multiplier (Q): 1101
  • Multiplier (M): 1100
  • Accumulator (A): 0000
  • Carry (C): 0

Step-by-Step Right Shift Operation

1. Before Shift:

  • A: 0000
  • Q: 1101

Exercise the operation on the LSB of Q (Q0). If Q0 is 1, add (A + M), or (A + 0M depending on the proper treatment of the final carry during addition) to the accumulator and then shift.

Perform Addition

  • Add (A + M): To sum 0000 and 1100 one gets 1100.
  • Update Accumulator (A): 1100

Shift Right

  • Right Shift Accumulator (A): 1100 becomes 0110
  • Right Shift Multiplier (Q): 1101 is equal to 0110
  • Carry (C): 0 (remains the same unless there was an overflow in addition)

Result After Shift

  • A: 0110
  • Q: 0110
  • Carry (C): 0

This is done for the number of bits in the multiplier, thus, the number of bits in the product will be determined by the number of times this operation is done. In which for each bit in the multiplier, if the current is equal to one, performs the addition and store it in the accumulator along with shifting right.

Advantages of Sequential Binary Multiplier

  • Simplicity: Sequential binary multipliers are not so complex and thus can easily be designed and implemented. They utilize elementary operations such as addition and shifting operation which are easily understandable and can also easily implemented in either in hardware or software.
  • Reduced Hardware Complexity: There are a number of types of multipliers, but out of all of them sequential binary multipliers are notable for the fact that they use considerably fewer components as compared, for example, to parallel multipliers. They use fewer adders and logic gates because the operations are done one by one instead of all the operations at the same time.
  • Flexible Precision: The sequential binary multipliers are designed in such a way that they can accommodate a change in the bit size. By changing the amount of steps, they are able to perform multiplication of numbers which have different length of bits, thus being able to handle a vast number of computations.
  • Ease of Integration: In these multipliers, one can easily interface them to other bigger digital systems since they are comparatively simple. It integrates nicely with systems that already uses sequential logic for other processes.

Disadvantages of Sequential Binary Multiplier

  • Speed: Sequential binary multipliers are considered to be slower than parallel multipliers mainly because the former operates on the bits serial-wise. So it takes many clock cycles to compute each bit of the result and the entire multiplication may turn to be slow.
  • Sequential Nature: Sequential operations mean that one has to wait for another to be carried out which is not efficient in high speed, applications that prefer parallel processing.
  • Complexity with Larger Bit Sizes: It means that the more digits there are in the numbers which are to be multiplied, the more steps will be needed for the completion of the calculation. This can result in increased computation time as well a complicated control logic in the monitoring process.
  • Intermediate Storage Requirements: An additional complication is introduced by use of an accumulator and carry registers which increases storage needs. There is unique an operational demand for additional storage space In case of large bit sizes, such needs may turn out to be substantial .
  • Educational Tools: Sequential binary multipliers are simple and they are often employed in teaching on basic principles of Digital arithmetic and the design of Sequential Logic.

Applications of Sequential Binary Multiplier

  • Embedded Systems: Sequential binary multipliers are typically used in embedded systems resulting in both these benefits of less utilization of resources and simplicity. It is more versatile in the usage that is in microcontrollers and in digital signal processors where it can be used to multiply the small to medium-sized binary numbers.
  • Digital Signal Processing (DSP): In DSP applications such as in the processing of signals, the operations that are usually done include multiplications and these are performed using sequential binary multipliers in algorithms like filtering and Fourier transforms.
  • Arithmetic Logic Units (ALUs): Sequential binary multipliers can be used for multiplication purposes in the ALU’s of the processors. They are particularly effective for processors in which multiplication occurs fewer times than addition.
  • Educational Tools: This is due to their simple structure and they can be used often in learning environment to teach basic arithmetic logic and sequential logic circuits.

Conclusion

Sequential binary multipliers are important building blocks for the digital arithmetic and can be regarded as efficient solution for binary multiplication used in various digital circuits. Their design is anchored on simple operations such as addition and shifting and therefore easy to master. Nevertheless, their factored structure makes them slower than advanced parallel multipliers due to their sequential operation. Nevertheless, due to their simplicity and fewer demands towards the hardware these nets might be applied in number of ways, particularly in conditions when the amount of resources is limited.


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